My Generation: Open Standards Help Members Push Next PCIe Milestone Forward

By Jeff A. Stuecheli, Power Systems Architect, IBM Cognitive Systems

Earlier this week, another validation of the OpenPOWER Foundation’s model of collaborative innovation was announced when members Xilinx and IBM revealed that they are working together to maximize the potential of the next generation of the PCIe interface, Gen4, on OpenPOWER. In a statement, Xilinx wrote:

“Together with IBM, the two companies are first to double interconnect performance between an accelerator and CPU through the use of PCI Express Gen4 compared to the existing widely-deployed PCI Express Gen3 standard. Gen4 doubles the bandwidth between CPUs and accelerators to 16 Gbps per lane, thereby accelerating performance in demanding data center applications such as artificial intelligence and data analytics.”

[caption id=“attachment_4795” align=“aligncenter” width=“625”] OpenPOWER Foundation members IBM and Xilinx are working together to maximize the next generation of the PCIe interface, Gen4, on OpenPOWER.[/caption]

Former OpenPOWER Foundation President and IBM VP and Fellow Brad McCredie added, “This leadership in PCI Express is another reason that POWER architecture is being deployed in modern data centers. IBM is excited to leverage the underlying performance of PCIe Express Gen4 for CAPI 2.0 which eases the programming experience for application developers.”

Collaborative Innovation Strikes Again

While other vendors decided to move to proprietary standards on proprietary platforms, IBM, Xilinx, Mellanox Technologies and other companies realized early on that by working together and pooling their collective expertise, they could be pioneers for the next generation of PCIe

And collaboration drives innovation. A key covenant of the OpenPOWER strategy is the aggressive adoption of industry leading open interface standards, to facilitate the integration of best of breed silicon technology.

“We believe in open standards,” said Ivo Bolsens, CTO at Xilinx. “It’s gratifying to see this milestone between our companies that will alleviate significant performance bottlenecks in accelerated computing, particularly for data center computing.”

“Collaborations between companies have and will enable the best of breed technologies and solutions in the market, that enable the highest data center return on investment”, said Gilad Shainer, vice president of marketing at Mellanox Technologies. “Mellanox was the first to enable PCIe Gen4 network adapters, which can connect to PCIe Gen4 CPUs, FPGAs and more, accelerating data throughput, resulting in higher applications performance, efficiency and scalability.”

Beyond the raw speed of PCIe Gen 4, the next generation coherent accelerator technology (CAPI 2.0) is provided between the POWER9 and Xilinx FPGAs.  This industry leading protocol enables the efficient integration of FPGA based accelerators and POWER9 CPUs, with greatly reduced communication overheads. Already the potential of PCIe Gen4 on the OpenPOWER platform is opening up intriguing use cases. You can see how people are already using Xilinx FPGAs on OpenPOWER with CAPI in our CAPI series:

• Pt 1: Accelerating Business Applications in the Data-Driven Enterprise with CAPI
• Pt 2: Using CAPI and Flash for larger, faster NoSQL and analytics
• Pt 3: Interconnect Your Future with Mellanox 100Gb EDR Interconnects and CAPI
• Pt 4: Accelerating Key-value Stores (KVS) with FPGAs and OpenPOWER

In the data centric world of cognitive computing, the ability to drive high communication rates between high performance devices is paramount. As PCIe Gen4 on CAPI 2.0 doubles that rate, systems can now transfer data in half the time, relieving a key bottleneck. Let us know in the comments below how you plan to utilize PCIe Gen4 on OpenPOWER!